Semiconductor devices have traditionally been packaged by connecting the semiconductor chip to the external package leads by a multiplicity of fine wires individually bonded to the semiconductor chip. Many devices are still fabricated in this fashion.
For several years, attempts have been made to eliminate the one-at-a-time wire bonding step by connecting a substantially flat leadframe comprising multiple fine leads directly to the semiconductor chip in a gang-bonding operation providing essentially simultaneous multiple-lead attachment to reduce costs and increase reliability. Representative of this approach is U.S. Pat. No. 3,698,074 hereby incorporated by reference. In the approach contemplated by the reference, a soft internal leadframe, such as aluminum or copper, is bonded both to the semiconductor chip and to a harder, thicker external leadframe suitable for making connections to the encapsulated device.
Variations on the reference approach have been proposed in order to increase economy and reliability by eliminating the multiple leadframes. For example, U.S. Pat. No. 3,922,712 describes a hard frame configuration which is partially solder clad for connection to relatively thick bump bonding areas on the semiconductor chip. In addition to the temperature limitations introduced by the solder technique (suitable chiefly for subsequent plastic encapsulation) the provisions of thick bumps on the semiconductor chips increases the cost and precludes the use of the bumped chip with other bonding techniques where one chip type is to be used in a number of different packages.
It is an object of the present invention to provide a leaded semiconductor chip assembly comprising hard leads bonded directly to the semiconductor chip metallization without the use of solder.
It is a further object of the present invention to minimize the complexity of the lead-attach metallurgy.
It is yet another object of this invention to provide a leaded semiconductor chip assembly where the leads are suitable for direct connection to an external circuit.
It is yet another object of this invention to provide a leaded semiconductor chip assembly wherein all the bonds are formed substantially simultaneously.
It is yet a further object of this invention to provide a leaded semiconductor chip assembly which may be glass-encapsulated for mechanical and electrical stability.
In the devices of the present invention, a multiplicity of hard leads are bonded directly to relatively thin bonding areas on the semiconductor chip. When the bonded assembly is subsequently encapsulated, such as by glass or plastic, the hard leads serve as elements for external connections to the device. Bonding may be facilitated by the provision of relatively thinner hard lead portions at their inner ends where they are bonded to the semiconductor chip.
Structurally, the elements of the present invention include a substantially aluminum bonding area supported by a thin pedestal of a harder metal on the semiconductor chip; together with a substantially flat hard leadframe of a coefficient of expansion similar to the semiconductor, which frame has been annealed prior to bonding in order to reduce its tensile strength and facilitate the bonding operation. Bonding is further facilitated by the provision of ultrasonic energy in order to achieve a bond between the hard metal lead and the substantially aluminum bonding pad which materials are not amenable to conventional thermo/compression welding. The bonds are post-annealed in order to relieve bonding stresses and increase pull strength.
By the cooperative combination of the foregoing structural and process elements, a practical semiconductor device having a direct bonded unitary hard lead is achieved.